From owner-acpi-jp@jp.FreeBSD.org Wed Sep 11 05:44:37 2002
Received: (from daemon@localhost)
	by castle.jp.FreeBSD.org (8.11.6+3.4W/8.11.3) id g8AKibi54856;
	Wed, 11 Sep 2002 05:44:37 +0900 (JST)
	(envelope-from owner-acpi-jp@jp.FreeBSD.org)
Received: from mail.speakeasy.net (mail14.speakeasy.net [216.254.0.214])
	by castle.jp.FreeBSD.org (8.11.6+3.4W/8.11.3) with ESMTP/inet id g8AKia354849
	for <acpi-jp@jp.FreeBSD.org>; Wed, 11 Sep 2002 05:44:36 +0900 (JST)
	(envelope-from jhb@FreeBSD.org)
Received: (qmail 25216 invoked from network); 10 Sep 2002 20:45:13 -0000
Received: from unknown (HELO server.baldwin.cx) ([216.27.160.63]) (envelope-sender <jhb@FreeBSD.org>)
          by mail14.speakeasy.net (qmail-ldap-1.03) with DES-CBC3-SHA encrypted SMTP
          for <acpi-jp@jp.FreeBSD.org>; 10 Sep 2002 20:45:13 -0000
Received: from laptop.baldwin.cx (gw1.twc.weather.com [216.133.140.1])
	by server.baldwin.cx (8.12.5/8.12.5) with ESMTP id g8AKiVBv032737;
	Tue, 10 Sep 2002 16:44:31 -0400 (EDT)
	(envelope-from jhb@FreeBSD.org)
Message-ID: <XFMail.20020910164432.jhb@FreeBSD.org>
X-Mailer: XFMail 1.5.2 on FreeBSD
X-Priority: 3 (Normal)
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 8bit
MIME-Version: 1.0
In-Reply-To: <20020911.052040.41625914.iwasaki@jp.FreeBSD.org>
From: John Baldwin <jhb@freebsd.org>
To: Mitsuru IWASAKI <iwasaki@jp.FreeBSD.org>
Cc: imp@bsdimp.com, acpi-jp@jp.FreeBSD.org
Reply-To: acpi-jp@jp.FreeBSD.org
Precedence: list
Date: Tue, 10 Sep 2002 16:44:32 -0400
X-Sequence: acpi-jp 1813
Subject: [acpi-jp 1813] Re: acpi issue on my Fiva 205
Errors-To: owner-acpi-jp@jp.FreeBSD.org
Sender: owner-acpi-jp@jp.FreeBSD.org
X-Originator: jhb@FreeBSD.org
X-Distribute: distribute version 2.1 (Alpha) patchlevel 24e+020902


On 10-Sep-2002 Mitsuru IWASAKI wrote:
>> > I've recalled pci_cfgregwrite() for this purpose and modified
>> > acpi_pci_link_set_irq() a bit.  After AcpiSetCurrentResources(),
>> > write irq to PCI config space.
>> 
>> We shouldn't need this.  When we read the intline, we read it via ivars
>> using pci_get_irq().  When we route an interrupt for the card bus controller,
>> we do this:
>> 
>>                         cfg->intline = PCIB_ROUTE_INTERRUPT(
>>                                 device_get_parent(dev), child, cfg->intpin);
>>                         if (PCI_INTERRUPT_VALID(cfg->intline)) {
>>                                 pci_write_config(child, PCIR_INTLINE,
>>                                     cfg->intline, 1);
>>                                 resource_list_add(rl, SYS_RES_IRQ, 0,
>>                                     cfg->intline, cfg->intline, 1);
>>                         }
> 
> I think this code is only for cfg->intline == 255 case, right?
> IRQs set by BIOS are 5 and 4, so interrupt routing never be called on
> this machine's card bus controller.
> This makes things complicated...

Well, *cough*, the stuff I am working on now is going to enable routing
of all interrupts to work around stuff like this.  We already do that
on ia64.  Just look for #ifdef __ia64__ in sys/dev/pci/pci_bus.c and
turn that on.  It needs a change though to work right.  This is what
I'm actually using:

--- //depot/vendor/freebsd/src/sys/dev/pci/pci.c        2002/09/03 20:55:30
+++ //depot/user/jhb/acpipci/dev/pci/pci.c      2002/09/05 10:22:01
@@ -746,7 +746,7 @@
        pcicfgregs *cfg = &dinfo->cfg;
        struct resource_list *rl = &dinfo->resources;
        struct pci_quirk *q;
-       int b, i, f, s;
+       int b, i, irq, f, s;
 
        b = cfg->bus;
        s = cfg->slot;
@@ -762,14 +762,15 @@
        }
 
        if (cfg->intpin > 0 && PCI_INTERRUPT_VALID(cfg->intline)) {
-#ifdef __ia64__
                /*
-                * Re-route interrupts on ia64 so that we can get the
-                * I/O SAPIC interrupt numbers (the BIOS leaves legacy
-                * PIC interrupt numbers in the intline registers).
+                * Try to re-route interrupts. Sometimes the BIOS or
+                * firmware may leave bogus values in these registers.
+                * If the re-route fails, then just stick with what we
+                * have.
                 */
-               cfg->intline = PCIB_ROUTE_INTERRUPT(pcib, dev, cfg->intpin);
-#endif
+               irq = PCIB_ROUTE_INTERRUPT(pcib, dev, cfg->intpin);
+               if (PCI_INTERRUPT_VALID(irq))
+                       cfg->intline = irq;
                resource_list_add(rl, SYS_RES_IRQ, 0, cfg->intline,
                  cfg->intline, 1);
        }

The only difference here being that we don't write back to the actual
intline register on the device itself.  The effect is the same,
however.  My aim is to turn this on for at least ia64 and i386 eventually
to work around cases where the BIOS does bad things.  I need to make
interrupt routing work on SMP first, though, and that is going to be
a pretty good chunk of work to get done.

-- 

John Baldwin <jhb@FreeBSD.org>  <><  http://www.FreeBSD.org/~jhb/
"Power Users Use the Power to Serve!"  -  http://www.FreeBSD.org/
