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From: nork@cityfujisawa.ne.jp (Norikatsu Shigemura)
To: FreeBSD-tech-jp@jp.freebsd.org
In-Reply-To: Your message of "Sat, 27 Oct 2001 22:25:39 +0900".
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Date: Thu, 8 Nov 2001 00:59:12 +0900
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Subject: [FreeBSD-tech-jp 3236] Re: agp driver for i820/i840/i845/i850/i860
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$B=EB<K!9n$G$9!#(B

	$B$U$H(B i820 $B$,$"$C$?$N$r;W$$=P$7$^$7$?!#$H$$$&$o$1$GBP1~$7$F$_$^(B
	$B$7$?$,!D!#(B i820 $B%A%C%W%;%C%H:\$;$?%^%6!<;}$C$F$k?M$C$F$$$k$N$+(B
	$B$J$!!#!#!#(B

--- sys/pci/agp_intel.c.orig	Wed Jul 19 18:48:04 2000
+++ sys/pci/agp_intel.c	Thu Nov  8 00:27:19 2001
@@ -74,6 +74,21 @@
 
  	case 0x71a18086:
  		return ("Intel 82443GX host to AGP bridge");
+
+	case 0x25008086:
+ 		return ("Intel 82820 host to AGP bridge");
+
+	case 0x1a218086:
+ 		return ("Intel 82840 host to AGP bridge");
+
+	case 0x1a308086:
+ 		return ("Intel 82845 host to AGP bridge");
+
+	case 0x25308086:
+ 		return ("Intel 82850 host to AGP bridge");
+
+	case 0x25318086:
+ 		return ("Intel 82860 host to AGP bridge");
 	};
 
 	if (pci_get_vendor(dev) == 0x8086)
@@ -102,6 +117,7 @@
 {
 	struct agp_intel_softc *sc = device_get_softc(dev);
 	struct agp_gatt *gatt;
+	u_int32_t type = pci_get_devid(dev);
 	int error;
 
 	error = agp_generic_attach(dev);
@@ -130,11 +146,52 @@
 	pci_write_config(dev, AGP_INTEL_ATTBASE, gatt->ag_physical, 4);
 	
 	/* Enable things, clear errors etc. */
-	pci_write_config(dev, AGP_INTEL_AGPCTRL, 0x2280, 4);
-	pci_write_config(dev, AGP_INTEL_NBXCFG,
-			 (pci_read_config(dev, AGP_INTEL_NBXCFG, 4)
-			  & ~(1 << 10)) | (1 << 9), 4);
-	pci_write_config(dev, AGP_INTEL_ERRSTS + 1, 7, 1);
+	switch (type) {
+	case 0x1a218086: /* i840 */
+	case 0x25308086: /* i850 */
+	case 0x25318086: /* i860 */
+		pci_write_config(dev, AGP_INTEL_AGPCTRL, 0x0000, 4);
+		pci_write_config(dev, AGP_INTEL_MCHCFG,
+				 (pci_read_config(dev, AGP_INTEL_MCHCFG, 2)
+				  | (1 << 9)), 2);
+		break;
+
+	case 0x25008086: /* i820 */
+		pci_write_config(dev, AGP_INTEL_AGPCTRL, 0x0000, 4);
+		pci_write_config(dev, AGP_INTEL_I820_RDCR,
+				 (pci_read_config(dev, AGP_INTEL_I820_RDCR, 1)
+				  | (1 << 1)), 1);
+		break;
+
+	case 0x1a308086: /* i845 */
+		pci_write_config(dev, AGP_INTEL_AGPCTRL, 0x0000, 4);
+		pci_write_config(dev, AGP_INTEL_I845_MCHCFG,
+				 (pci_read_config(dev, AGP_INTEL_I845_MCHCFG, 1)
+				  | (1 << 1)), 1);
+		break;
+
+	default: /* Intel Generic (maybe) */
+		pci_write_config(dev, AGP_INTEL_AGPCTRL, 0x2280, 4);
+		pci_write_config(dev, AGP_INTEL_NBXCFG,
+				 (pci_read_config(dev, AGP_INTEL_NBXCFG, 4)
+				  & ~(1 << 10)) | (1 << 9), 4);
+	}
+
+	switch (type) {
+	case 0x1a218086: /* i840 */
+		pci_write_config(dev, AGP_INTEL_I8XX_ERRSTS, 0xc000, 2);
+		break;
+
+	case 0x25008086: /* i820 */
+	case 0x1a308086: /* i845 */
+	case 0x25308086: /* i850 */
+	case 0x25318086: /* i860 */
+		pci_write_config(dev, AGP_INTEL_I8XX_ERRSTS, 0x001c, 2);
+		break;
+
+	default: /* Intel Generic (maybe) */
+		pci_write_config(dev, AGP_INTEL_ERRSTS + 1, 7, 1);
+	}
 
 	return 0;
 }
@@ -143,18 +200,48 @@
 agp_intel_detach(device_t dev)
 {
 	struct agp_intel_softc *sc = device_get_softc(dev);
+	u_int32_t type = pci_get_devid(dev);
 	int error;
 
 	error = agp_generic_detach(dev);
 	if (error)
 		return error;
 
-	printf("%s: set NBXCFG to %x\n", __FUNCTION__,
-			 (pci_read_config(dev, AGP_INTEL_NBXCFG, 4)
-			  & ~(1 << 9)));
-	pci_write_config(dev, AGP_INTEL_NBXCFG,
-			 (pci_read_config(dev, AGP_INTEL_NBXCFG, 4)
-			  & ~(1 << 9)), 4);
+	switch (type) {
+	case 0x1a218086: /* i840 */
+	case 0x25308086: /* i850 */
+	case 0x25318086: /* i860 */
+		printf("%s: set MCHCFG to %x\n", __FUNCTION__, (unsigned)
+				(pci_read_config(dev, AGP_INTEL_MCHCFG, 2)
+				& ~(1 << 9)));
+		pci_write_config(dev, AGP_INTEL_MCHCFG,
+				(pci_read_config(dev, AGP_INTEL_MCHCFG, 2)
+				& ~(1 << 9)), 2);
+
+	case 0x25008086: /* i820 */
+		printf("%s: set RDCR to %x\n", __FUNCTION__, (unsigned)
+				(pci_read_config(dev, AGP_INTEL_I820_RDCR, 1)
+				& ~(1 << 1)));
+		pci_write_config(dev, AGP_INTEL_I820_RDCR,
+				(pci_read_config(dev, AGP_INTEL_I820_RDCR, 1)
+				& ~(1 << 1)), 1);
+
+	case 0x1a308086: /* i845 */
+		printf("%s: set MCHCFG to %x\n", __FUNCTION__, (unsigned)
+				(pci_read_config(dev, AGP_INTEL_I845_MCHCFG, 1)
+				& ~(1 << 1)));
+		pci_write_config(dev, AGP_INTEL_MCHCFG,
+				(pci_read_config(dev, AGP_INTEL_I845_MCHCFG, 1)
+				& ~(1 << 1)), 1);
+
+	default: /* Intel Generic (maybe) */
+		printf("%s: set NBXCFG to %x\n", __FUNCTION__,
+				 (pci_read_config(dev, AGP_INTEL_NBXCFG, 4)
+				  & ~(1 << 9)));
+		pci_write_config(dev, AGP_INTEL_NBXCFG,
+				 (pci_read_config(dev, AGP_INTEL_NBXCFG, 4)
+				  & ~(1 << 9)), 4);
+	}
 	pci_write_config(dev, AGP_INTEL_ATTBASE, 0, 4);
 	AGP_SET_APERTURE(dev, sc->initial_aperture);
 	agp_free_gatt(sc->gatt);
--- sys/pci/agpreg.h.orig	Wed Jul 19 18:48:04 2000
+++ sys/pci/agpreg.h	Thu Nov  8 00:27:41 2001
@@ -57,6 +57,14 @@
 #define AGP_INTEL_ATTBASE	0xb8
 
 /*
+ * Config offsets for Intel i820/i840/i845/i850/i860 AGP chipsets.
+ */
+#define AGP_INTEL_MCHCFG	0x50
+#define AGP_INTEL_I820_RDCR	0x51
+#define AGP_INTEL_I845_MCHCFG	0x51
+#define AGP_INTEL_I8XX_ERRSTS	0xc8
+
+/*
  * Config offsets for VIA AGP chipsets.
  */
 #define AGP_VIA_GARTCTRL	0x80
