From owner-FreeBSD-users-jp@jp.freebsd.org  Mon Feb  9 19:48:33 1998
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To: FreeBSD-users-jp@jp.freebsd.org, matumoto@pluto.ai.kyutech.ac.jp
From: Tomoaki NISHIYAMA <tomoaki@biol.s.u-tokyo.ac.jp>
In-Reply-To: Your message of "Mon, 9 Feb 1998 17:37:00 +0900 (JST)"
	<199802090837.RAA03209@pluto20.pluto.ai.kyutech.ac.jp>
References: <199802090837.RAA03209@pluto20.pluto.ai.kyutech.ac.jp>
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Date: Mon, 09 Feb 1998 19:48:29 +0900
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Subject: [FreeBSD-users-jp 24369] Re: gcc bug
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$B@>;3!wElBg$G$9!#(B

$BKM$NA[A|$9$k$H$3$m$G$O!"(BFPU$B$N(Bcontrol word$B$,(B53bit$B@:EY(B($B2>?t(B)$B$K(B
$B@_Dj$5$l$F$$$k$;$$$@$H;W$$$^$9!#(B

960412271599200128.000000
$B$H$$$&CM$O(Bdouble$B$G7W;;$7$?$H$-$KF@$i$l$kCM$K0lCW$7$^$9(B

$B%G%U%)%k%H$G$O!"(B__BROKEN_NPXCW__$B$,Dj5A$5$l$F$$$J$$$H(B__BDE_NPXCW__
$B$,MxMQ$5$l(BFPU$B$,(B53bit$B@:EY(B($B2>?t(B)$B$K$J$j$^$9!#(B80bit(64bit$B2>?t(B)$B$r;H$&$H$-$K$O(B
387$B$N(Bcontrol word $B$r$$$8$k%3!<%I$r%W%m%0%i%`Kh$K$$$l$kI,MW$,$"$k$N$G$7$g$&!#(B
control word$B$r%7%9%F%`%l%Y%k$GJQ$($F$7$^$&$N$b<j$G$9$,!"$I$3$G$D$+$C$F$b(B
$BF1$87k2L$,F@$i$l$k$h$&$K$9$k$K$O%W%m%0%i%`Kh$K$$$l$6$k$rF@$J$$$G$7$g$&!#(B
gcc$B$N(Bbug$B$G$O$J$$$H;W$$$^$9!#(B

/usr/include/machine/npx.h
----------------------
/* Intel prefers long real (53 bit) precision */
#define	__iBCS_NPXCW__		0x262
/* wfj prefers temporary real (64 bit) precision */
#define	__386BSD_NPXCW__	0x362
/*
 * bde prefers 53 bit precision and all exceptions masked.
 *
 * The standard control word from finit is 0x37F, giving:
 *
 *	round to nearest
 *	64-bit precision
 *	all exceptions masked.
 *
 * Now I want:
 *
 *	affine mode for 287's (if they work at all) (1 in bitfield 1<<12)
 *	53-bit precision (2 in bitfield 3<<8)
 *	overflow exception unmasked (0 in bitfield 1<<3)
 *	zero divide exception unmasked (0 in bitfield 1<<2)
 *	invalid-operand exception unmasked (0 in bitfield 1<<0).
 *
 * 64-bit precision often gives bad results with high level languages
 * because it makes the results of calculations depend on whether
 * intermediate values are stored in memory or in FPU registers.
 *
 * The "Intel" and wfj control words have:
 *
 *	underflow exception unmasked (0 in bitfield 1<<4)
 *
 * but that causes an unexpected exception in the test program 'paranoia'
 * and makes denormals useless (DBL_MIN / 2 underflows).  It doesn't make
 * a lot of sense to trap underflow without trapping denormals.
 *
 * Later I will want the IEEE default of all exceptions masked.  See the
 * 0.0 math manpage for why this is better.  The 0.1 math manpage is empty.
 */
#define	__BDE_NPXCW__		0x1272
#define	__BETTER_BDE_NPXCW__	0x127f

#ifdef __BROKEN_NPXCW__
#ifdef __FreeBSD__
#define	__INITIAL_NPXCW__	__386BSD_NPXCW__
#else
#define	__INITIAL_NPXCW__	__iBCS_NPXCW__
#endif
#else
#define	__INITIAL_NPXCW__	__BDE_NPXCW__
#endif
