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Subject: [watcher-work 3172] High paid position for you
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A decade ago, Saraswat's research group was the first to begin developing a new kind of chip architecture: the 3-dimensional integrated circuit (3-D IC). Compared to the 2-D planar chips in computers today, 3-D chips can provide the same processing power with a reduced chip surface area. Also, instead of having long, twisting highways of wires, the stacked chips in 3-D ICs allow for short wires much like elevator shafts, as Professor Chidsey puts it-mitigating the problem of delay in the wires. Moreover, 3-D IC architecture allows the integration of all kinds of chips, since chips that require different technologies or materials can be stacked together.








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Currently, the gate length, the characteristic length parameter in transistors, has hit about 90 nm. The shorter the gate length, the faster transistors can switch on and off. In fact, the transistors have gotten so fast, that the delay as electrons flow through the skinnier and longer wires needed to cross larger, complex chips is on track to become the limiting factora in speed. This delay is just one of the fundamental problems that threatens to make the nanoscale regime of electronics unfaithful to Moore's Law and demands the design of new materials and structures or a complete shift in chip architecture.
In other applications of carbon nanotubes, Dai has Professor Michael McGehee is developing cheap and efficient nanostructured solar cells.

