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java.lang.Objectcoins.backend.sched.LirNodeInf
Class to generate information of LirNode instruction
| Field Summary | |
(package private) LirNode |
lirNode
|
(package private) static int |
LOAD_LATENCY
|
(package private) MachineParams |
machineParams
|
(package private) static LirNode |
MEM
|
(package private) static int |
PARALLEL_LATENCY
|
(package private) Schedule |
schedule
|
(package private) static LirNode |
STACK_REG
|
| Constructor Summary | |
(package private) |
LirNodeInf(LirNode ln,
Schedule schedule)
|
| Method Summary | |
(package private) void |
addMemDef(BiList bl,
LirNode ln)
Add constant MEM to BiList bl, if ln is a SET instruction and left hand child has a MEM instruction |
(package private) void |
addMemUse(BiList bl,
LirNode ln)
Add constant MEM to BiList bl, if ln is a SET instruction and right hand child has a MEM instruction, or if ln is a CALL instruction (because stack memory may be used as parameters) |
(package private) void |
addReg(BiList bl,
LirNode ln)
|
(package private) void |
addRegDef(BiList bl,
LirNode ln)
Add registers defined in LirNode ln to BiList bl |
(package private) void |
addRegUse(BiList bl,
LirNode ln)
Add registers used in LirNode ln to BiList bl |
(package private) boolean |
containsMEM(LirNode ln)
Return true if LirNode ln contains Op.MEM |
(package private) LirNode |
getCalleeReg(LirNode ln)
|
(package private) BiList |
input()
Return list of input(use) registers or MEM of this LirNode |
(package private) int |
latency(int cost)
Retrun latency of this LirNode |
(package private) BiList |
output()
Return list of output(def) registers or MEM of this LirNode |
| Methods inherited from class java.lang.Object |
clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait |
| Field Detail |
static final int LOAD_LATENCY
static final int PARALLEL_LATENCY
static final LirNode MEM
static final LirNode STACK_REG
LirNode lirNode
Schedule schedule
MachineParams machineParams
| Constructor Detail |
LirNodeInf(LirNode ln,
Schedule schedule)
| Method Detail |
BiList input()
BiList output()
int latency(int cost)
cost - boolean containsMEM(LirNode ln)
ln -
void addMemUse(BiList bl,
LirNode ln)
bl - ln -
void addMemDef(BiList bl,
LirNode ln)
bl - ln -
void addRegUse(BiList bl,
LirNode ln)
bl - ln -
void addRegDef(BiList bl,
LirNode ln)
bl - ln -
void addReg(BiList bl,
LirNode ln)
LirNode getCalleeReg(LirNode ln)
|
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